1. Field of the Invention
The present invention relates to the field of semiconductor processing and more particularly to a buffer structure for a semiconductor device and its methods of fabrication.
2. Discussion of the Related Art
The increasing need for faster transistors has led to the use of germanium (Ge) strained quantum well channels as a candidate for replacing strained silicon (Si) channels in field-effect-transistors (FETs). Due to different materials, the Ge quantum well channel is integrated on a Si substrate by transition layers or buffer layers. The buffer layers are formed between the Si substrate and Ge quantum well channel to prevent any defects due to the lattice mismatch between the Si substrate and Ge quantum well channel.
FIG. 1 illustrates a conventional semiconductor device 100 comprising a Si substrate 110 having a graded Ge buffer layer 121 formed thereon. A silicon-germanium (SiGe) buffer layer 122 is formed on the Ge buffer layer 121. An undoped Ge channel layer 140 is formed on the SiGe buffer layer 122. Typically, the Ge channel layer 440 is around 20 nanometers thick. The semiconductor device further comprises multiple SiGe intermediate layers 161, 162, 163 formed on the Ge channel later 140. The intermediate layers 164, 162, 163 are about 10 to 20 nanometers thick. A Si cap layer 180 is formed on intermediate layer 163.
Typically, each of the graded Ge buffer layer 121 and SiGe buffer layer 122 are around 1 microns thick in order to sufficiently prevent defects in the Si substrate 110 and Ge channel layer 140 as well as prevent defects in the Ge buffer layer 121 and SiGe buffer layer 122. However, the thick Ge buffer layer 121 and SiGe buffer layer 122 makes it difficult to integrate the semiconductor device 100 within shallow-trench-isolation (STI) regions, which typically have depths of around 0.2 to 0.4 microns.